Lithography System Performance Engineer

Introduction to the job

At wafer defectivity we investigate phenomena (particle sources, transport, issues, performance, improvement opportunities etc) in order to improve performance of new and existing products at customers and in our factory. Ultimate objective is to define solutions and containments for existing products and to give guidance for the development of new scanners to meet PWP (particle per wafer pass) and availability targets. Key input for our work is based on defectivity data, received from customer or factory, which requires proper storage, analysis, visualization and further processing. Therefore, we are looking for an engineer responsible for data quality, analysis and roadmap as well as interface to other entities, such as IT and other competencies as key user for database.

Role and Responsibilities

• Ensure data quality for the wafer defectivity group (automation of work flows, monitor incoming data, storage and processing)

• Development and optimization of data visualization tools in spotfire

• Key user for defectivity database

• Management of data access rights and data governance

• Defectivity data analysis (complex statistics) + Data interpretations (defectivity knowledge)

• Development of data analysis tools and methods for defectivity (e.g. particle size and shape analysis, forecasting of PWP per scanner at customer)

• Collaboration with whole group (escalation team, structural team and NPI team) as well as stakeholders (IT, CS, EF, FCs, TCs)

• Train and enable team members on data topics

Education and experience

Master degree/PhD in data engineering, or engineer with strong affinity for data management and data analysis.

Preferred 1-3 years’ experience

Skills

• analytical skills and statistics

• good in collaboration and communication

• coding skills (matlab, python e.g.)

• basic understanding of data management and database

Other information

This position requires access to controlled technology, as defined in the Export Administration Regulations (15 C.F.R. § 730, et seq.). Qualified candidates must be legally authorized to access such controlled technology prior to beginning work. Business demands may require ASML to proceed with candidates who are immediately eligible to access controlled technology.

EOE AA M/F/Veteran/Disability

ASML is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that Diversity and inclusion is a driving force in the success of our company.

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Work Experience: 2-3 years

Travel: No

Education Level: Master,PhD

Employment Type: FULL_TIME

Team: Design Engineering and Architecture

Technical Field: Lithography System Performance